The present disclosure relates to methods of forming patterns of a semiconductor device.
As semiconductor devices have decreased in size, fin-type field effect transistors (FinFETs) have been introduced to secure characteristics of logic devices. A technology for forming fine patterns may be used to form fins of a FinFET. For example, a double-patterning technology (DPT) using spacers can be utilized to form fine patterns used as fins of a FinFET.
A threshold voltage Vth of a FinFET may be related to line widths of fins of the FinFET. When a DPT using spacers is utilized, however, patterns having the same line width may be formed because spacers typically have the same line width. Thus, it may be difficult to form patterns having varying line widths.